Introduction
In this article, which our team will regularly update, we will maintain a growing list of information pertaining to upcoming hardware releases based on leaks and official announcements as we spot them. There will obviously be a ton of rumors on unreleased hardware, and it is our goal to—based on our years of industry experience—exclude the crazy ones. In addition to these upcoming hardware release news, we will regularly adjust the structure of this article to better organize information. Each time an important change is made to this article, it will re-appear on our front page with a « new » banner, and the additions will be documented in the forum comments thread. This article will not leak information we signed an NDA for.
Feel free to share your opinions and tips in the forum comments thread and subscribe to the same thread for updates.
Last Update (Jun 9th):
Processors
AMD Ryzen 3000 XT / Matisse Refresh [added]
- Release Date: June 2020
- Based on Zen 2 architecture
- Uses 7 nm+ process by TSMC (N7P)
- Ryzen 9 3900 XT: 12c/24t, 4.1 GHz Base, 4.8 GHz Boost, 70 MB cache, 105 W, € 499
- Ryzen 7 3800 XT: 8c/16t, 4.2 GHz Base, 4.7 GHz Boost, 36 MB cache, 105 W, € 460
- Ryzen 5 3600 XT: 6c/12t, 4.0 GHz Base, 4.7 GHz Boost, 32 MB cache, 95 W, € 320
AMD Renoir for Desktop [updated]
AMD Cézanne Zen 3 APUs
AMD Zen 3 [updated]
- Release Date: September 2020
- Design completed as of Aug 2019
- Codename: Vermeer (CPU), Dali (APU w/ IGP), Milan (Server), Grey Hawk (Embedded), Genesis Peak (Threadripper)
- Zen 3 refresh, possibly based on improved tech called « Warhol »
- CCX removed, so that all cores on the CCD share a single large L3 cache
- Continues to use Socket AM4 for desktop
- Redesigned chiplets with 32+ MB shared L3 on each chiplet, as opposed to 2x 16 MB shared between CCX groups
- Zen 3 processors are compatible with B450, X470, B550 and X570 motherboards (after BIOS flash)
- Server platform codename « Genesis SP3 »
- Up to 64-cores (128-threads) across eight 8-core chiplets
- 120 – 225 W TDP
- Clock frequencies: 3.8 to 4.0 GHz base, 4.4 to 4.6 GHz boost
- PCIe Gen 4
- 8-channel DDR4 memory
- New process tech: 7 nm Plus (probably not 7 nm+ EUV)
- 20% increase in transistor density, 10% lower power consumption
- Up to 15% IPC improvement + more from higher clock frequencies
- Up to 50% faster floating point
- Possibly support for AVX-512
- New CPU core
AMD Zen 4
AMD Zen 5
Intel Ice Lake Server [added]
- Release date: late 2020, or 2021
- Ice Lake mobile was launched in Late 2019
- Ice Lake desktop was scrapped because it wasn’t competitive with Comet Lake
- Xeon codename « Whitley »
- Uses new 4189-pin LGA socket
- 8-channel DDR4 interface
- 10 nanometer DUV (deep-ultraviolet) process
- Brand-new CPU core design codenamed « Sunny Cove »
- PCI-Express Gen 4.0
- « GenuineIntel Family 6 Model 106 Stepping 4 » processor: 24c/48t, 2.2 GHz base, 2.9 GHz boost, L1D 48 KB, L1I 32 KB, L2 1.25 MB, L3 36 MB
- Adds AVX512 instructions (so far available only on HEDT platform, since Skylake-X). New instructions: AVX512F, AVX512CD, AVX512DQ, AVX512BW, and AVX512VL. New commands: AVX512_IFMA and AVX512_VBMI
- 20-30 broadening of various number crunching resources, wider execution window, more AGUs
- SHA-NI and Vector-AES instruction sets, up to 75% higher encryption performance vs. « Skylake »
- Supports unganged memory mode
- Integrated GPU based on new Gen11 architecture, up to 1 TFLOP/s ALU compute performance
- Integrated GPU supports DisplayPort 1.4a and DSC for 5K and 8K monitor support
- Gen11 also features tile-based rendering, one of NVIDIA’s secret-sauce features
- Integrated GPU supports VESA adaptive V-sync, all AMD FreeSync-capable monitors should work with this
Intel Ice Lake
- Release Date: Late 2019 (mobile), desktop/server 2020
- Ice Lake for desktop might be delayed even further (or scrapped completely) due to issues with the 10 nm process
- Uses 10 nanometer DUV (deep-ultraviolet) process
- Will use « Intel 10th gen » branding, with Core i3, i5 and i7
- First processors are mobile quad-core designs
- Ultra-low-power (ULP) platform was displayed at Computex: Using a multi-chip-module design, with TDP between 8 and 15 W
- Mass production started in Q3 2019
- Uses a brand-new CPU core design codenamed « Sunny Cove »
- Adds AVX512 instructions (so far available only on HEDT platform, since Skylake-X). New instructions: AVX512F, AVX512CD, AVX512DQ, AVX512BW, and AVX512VL. New commands: AVX512_IFMA and AVX512_VBMI
- 20-30 broadening of various number crunching resources, wider execution window, more AGUs
- SHA-NI and Vector-AES instruction sets, up to 75% higher encryption performance vs. « Skylake »
- Supports unganged memory mode
- First implementation will not be for a desktop processor, but a low-power SOC for notebooks (Ice Lake-U)
- Ice Lake-U is 4-core/8-thread based on Sunny Cove w/ Gen 11 GT2 graphics with 64 EUs.
- Ice Lake SP are Xeons « Whitley », which will launch in 2020.
- Integrated GPU based on new Gen11 architecture, up to 1 TFLOP/s ALU compute performance
- Integrated GPU supports DisplayPort 1.4a and DSC for 5K and 8K monitor support
- Gen11 also features tile-based rendering, one of NVIDIA’s secret-sauce features
- Integrated GPU supports VESA adaptive V-sync, all AMD FreeSync-capable monitors should work with this
Intel Core i9-10990XE
Intel Cannon Lake
- Release Date: Additional processors delayed to 2019+, probably canceled
- One mobile SKU launched in May: Core i3-8121U 2.2 GHz, no integrated graphics
- Core M3 8114Y: 1.5 GHz base, 2.2 GHz boost, 4.5 W TDP, Intel UHD iGPU
- 10 nanometer production process
- DDR4L support
- Intel is reportedly having difficulties ramping up 10 nm, which could lead to delays
- Adds AVX512 instructions (so far available only on HEDT platform, since Skylake-X). New instructions: AVX512F, AVX512CD, AVX512DQ, AVX512BW, and AVX512VL. New commands: AVX512_IFMA and AVX512_VBMI
Intel Lakefield Heterogenous processor
- Release Date: 2020
- Previewed: Oct 3, 2019
- Uses 10 nanometer production process
- A rendition of ARM big.LITTLE, but with Intel x86 cores
- One large performance core combined with four low-power cores, and power-gating added to the mix
- Uses Foveros Technology, which stacks IP blocks in three dimensions, not in a 2D plane like all current chip designs
- Die size 12 mm x 12 mm x 1 mm
- Big core is Sunny Cove based, small cores are Tremont based
- Integrated Gen11 iGPU
- Fully integrated chipset and network interfaces
- Package designed for PoP (package over package) setups with DRAM and NAND flash chips over Foveros packaging
- Target devices include tablets and tablet+notebook convertibles
- Project Athena is an industry-wide effort involving a dozen companies to develop the next step in powerful mobile computing, rivaling the Ultrabook development a decade ago
- Intel i5-L16G7: 1.4 GHz base, 1.75 GHz turbo, LPDDR4X memory
- Intel i5-L15G7: 5c/5t, 4 small Tremont cores + 1 big Sunny Cove core, 1.4 GHz base, 2.75 GHz turbo, 1 MB L2, 4 MB L3
Intel Tiger Lake [updated]
- Release Date: H2 2020
- Intel reconfirmed « mid-2020 » in their April 2020 Investor Call.
- Mobile chip, succeeds « Lakefield »
- CPU cores based on Willow Cove
- Will be used in « Ghost Canyon » and « Panther Canyon » NUC
- 28 W TDP
- Reorganized cache architecture
- Produced on 10 nm+ process
- Tiger Lake-Y: 4-core/8-thread, up to 5.0 GHz boost, 2.3 GHz base, 1.25 MB L2 cache per core, 12 MB L3 cache
- Tiger Lake-U: 28 W TDP
- Larger L1D (data) cache: 48 KB
- L1I (instruction) cache: 32 KB
- DDR4-3200 memory speed
- Platform name « Corktown »
- Adds support for LPDDR5 memory, up to 6.4 GT/s
- PCI-Express Gen 4
- Integrated GPU based on Intel Xe architecture (not Gen 11)
- GPU performance comparable to 8 CU Radeon Vega iGPU
- Cache size increased from 2 MB per-core to 3 MB per-core, so total 12 MB
- « Double digit CPU performance increase », « Massive AI performance enhancement »
- AVX512 supported
- Uses 10 nm+ process
- « Next-gen I/O », probably PCIe 4.0
- Thunderbolt support
- Core i7-1185G7 4.7 GHz Boost, 3DMark: 2922 CPU, 1296 GPU, overall 1414
- Core i7-1165G7: 4c/8t, 15 W or 28 W, 2.8 GHz Base, 4.4 GHz Boost, 3DMark: 4750 CPU, 1150 GPU, overall 1297
Intel Tremont / Snow Ridge [updated]
Intel Cooper Lake [updated]
Intel Willow Cove and Golden Cove Cores
- Release Date: 2020 and 2021
- Succeeds « Sunny Cove »
- Willow Cove improves on-die caches, adds more security features, and takes advantage of 10 nm+ process improvements to increase clock speeds versus Sunny Cove
- Golden Cove will add significant single-thread (IPC) increases over Sunny Cove, add on-die matrix multiplication hardware, improved 5G network-stack HSP performance, and more security features than Willow Cove
Intel Alder Lake [updated]
Intel Sapphire Rapids [updated]
Intel Rocket Lake [updated]
Intel Elkhart Lake [added]
Intel Meteor Lake [updated]
Intel Jasper Lake [added]
Intel Granite Rapids
VIA CenTaur / Zhaoxin KaiXian
Graphics / GPUs
NVIDIA RTX 3080 / RTX 3080 Ti / RTX 3090 [added]
NVIDIA RTX 2060 Super Mobile
NVIDIA GeForce MX450 Mobile
NVIDIA Ampere [updated]
- Release Date: H2 2020
- Announced: May 2020
- Successor to « Turing » architecture
- GeForce RTX 3000 Series
- Engineering Sample: 7936 CUDA cores, 124 CUs, at 1.1 GHz, 32 GB VRAM
- Engineering Sample: 7552 CUDA cores, 118 CUs, at 1.2 GHz, 24 GB VRAM
- Engineering Sample: 6912 CUDA cores, 108 CUs, at 1.01 GHz, 47 GB VRAM
- GA100 GPU: 826 mm², 54 billion transistors, 6912 CUDA cores, 3456 FP64 cores, 432 tensor cores, 108 SM, 40 GB HBM2E 6144-bit
- GA103 is used on GeForce RTX 3080, 60 SMs = 3840 CUDA cores, 320-bit memory, 10 or 20 GB GDDR6
- GA103 is used on GeForce RTX 3080, 60 SMs = 3840 CUDA cores, 320-bit memory, 10 or 20 GB GDDR6
- GA104 is used on GeForce RTX 3070, 40 SMs = 3072 CUDA cores, 256-bit memory, 8 or 16 GB GDDR6
- Produced on 7 nm TSMC & Samsung process
- Updated Tensor cores, with double-precision FP64
- PCI-Express 4.0 supported
- Half the power consumption
- Twice the performance (possibly for raytracing workloads)
- Tesla server cards are going into Indiana University Big Red 200 supercomputer
NVIDIA Hopper
AMD Radeon RX 5300 XT [updated]
AMD Radeon RX 5600M and RX 5700M [added]
- Release date: unknown
- Based on Navi 10 silicon
- 7 nanometer production process
- RX 5700M: 2304 shaders, 144 TMUs, 64 ROPS, 8 GB GDDR6 memory, 256-bit, 1620-1720 MHz
- RX 5600M: 2304 shaders, 144 TMUs, 64 ROPS, 6 GB GDDR6 memory, 192-bit, 1190-1265 MHz
AMD MI-NEXT
- Release Date: Unknown
- Successor to Vega 20
- This could be the Arcturus-based Radeon Instinct MI100
AMD Arcturus
AMD RDNA 2 [updated]
AMD RDNA 3
AMD CDNA and CDNA2
Intel Xe Discrete Graphics [updated]
- Release Date: mid-2020
- Announcement: Xe DG1-SDV (Software Development Vehicle) announced at CES 2020 (Jan 9th 2020)
- First Intel Discrete GPU since ill-fated Larrabee
- New architecture built from the ground up, and not an upscale of Gen 11
- Developer kit shipping as of Q4 2019, called « Discrete Graphics DG1 External FRD1 Accessory Kit (Alpha) Developer Kit »
- SDV OpenCL performance in Geekbench: 55373 points, with 3.53 Gpixels/s in « Sorbel, » 1.30 Gpixels/sec in Histogram Equalization, 16 GFLOPs in SFFT, 1.62 GPixels/s in Gaussian Blur, 4.51 Msubwindows/s in Face Detection, 2.88 Gpixels/s in RAW, 327.4 Mpixels/s in DoF, and 13656 FPS in Particle Physics. Roughly matches 11 CU Vega Picasso IGP
- SDV is 15.2 cm long, 96 Execution Units, PCI-Express x16, slot only power (so 75 W), 3x DisplayPort, 1x HDMI, high noise levels
- Up to 2x performance uplift for Intel Xe integrated graphics over previous Gen 11
- Using a multi-chip design approach, with Foveros, Intel Xe scales up to 512 EUs with 500 W
- 512 EU model is datacenter only, 300 W 256 EU model for enthusiast markets
- Targeted at 1080p gameplay, CES demonstration showed working gameplay on Destiny 2
- Could be produced at Samsung to leverage their 10 nm tech, while Intel ramps up its own
- Future Xe GPUs could be built on TSMC 6 nm and 3 nm nodes
- Raytracing hardware acceleration support will definitely be included on the data-center GPUs (and probably on the consumer models, too)
- Double-digit TFLOP/s scaling all the way up to 0.1+ PFLOP/s
- Will be used in upcoming Cray Aurora Supercomputer for Argonne National Laboratory in 2021
- Targeting a wide segment of markets, including consumer (client-segment) graphics, enthusiast-segment, and data-center compute
- Uses new graphics control panel that’s being introduced during 2019
Intel Discrete GPU / Arctic Sound
Intel Ponte Vecchio
Intel Jupiter Sound
Chipsets
Intel X399
Intel X499 / X299G
Intel X599
Intel Z399
Intel 500 Series Chipsets
Intel 495 Series Chipsets
AMD B550 & A520 Chipsets [updated]
AMD B550A Chipset
AMD 600-Series Chipsets
Memory
DDR5 System Memory
- Release Date: 2020 or 2021
- JEDEC standard not fully complete yet, as of Q1 2020, expected for later in 2020
- Demo’d in May 2018 by Micron: DDR5-4400
- Samsung 16 Gb DDR5 DRAM developed since February 2018
- Samsung has completed functional testing and validation of a LPDDR5 prototype: 10 nm class, 8 Gbit, final clocks: DDR5-5500 and DDR5-6400
- SK Hynix has 16 Gb DDR5-5200 samples ready, 1.1 V, mass production expected 2020
- April 2020: Hynix has 8.4 Gbps DDR5, minimum density per die is 8 Gbit, maximum is 64 Gbit
- ECC is now supported by all dies (no longer specific to server memory modules)
- SK Hynix demonstrated DDR5 RDIMM modules at CES 2020: 4800 MHz, 64 GB
- Micron is shipping LPDDR5 for use in Xiaomi phones (Feb 2 2020). 5.5 Gbps and 6.4 Gbps
- Samsung has begun production for LPDDR5 for mobile devices (Feb 25 2020). 16 GB, 5.5 Gbps
- 4800 – 6400 Mbps
- Expected to be produced using 7 nm technologies
- 32 banks, 8 bank groups
- 64-bit link at 1.1 V
- Voltage regulators on the DIMM modules
- AMD DDR5 memory support by 2021/2022, with Zen 4